[
 {
  "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main.v",
  "InstLine" : 2,
  "InstName" : "top",
  "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main.v",
  "ModuleLine" : 2,
  "ModuleName" : "top",
  "SubInsts" : [
   {
    "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main.v",
    "InstLine" : 64,
    "InstName" : "pll_main_clock",
    "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/gowin_rpll/gowin_rpll_245.v.v",
    "ModuleLine" : 10,
    "ModuleName" : "gowin_rpll_245"
   },
   {
    "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main.v",
    "InstLine" : 74,
    "InstName" : "main_rx_1_inst",
    "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_rx.v",
    "ModuleLine" : 2,
    "ModuleName" : "main_rx",
    "SubInsts" : [
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_rx.v",
      "InstLine" : 24,
      "InstName" : "receiver",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/aes3rx.vhd",
      "ModuleLine" : 14,
      "ModuleName" : "aes3rx"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_rx.v",
      "InstLine" : 40,
      "InstName" : "clocks",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/ultranet_rx_clocks.vhd",
      "ModuleLine" : 19,
      "ModuleName" : "ultranet_rx_clocks"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_rx.v",
      "InstLine" : 58,
      "InstName" : "deserializer",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/ultranet_rx_deserializer.vhd",
      "ModuleLine" : 18,
      "ModuleName" : "ultranet_rx_deserializer"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_rx.v",
      "InstLine" : 83,
      "InstName" : "demuxer",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/ultranet_rx_demux.vhd",
      "ModuleLine" : 12,
      "ModuleName" : "ultranet_rx_demux"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_rx.v",
      "InstLine" : 101,
      "InstName" : "transmitter",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/i2s_quad_transmitter.vhd",
      "ModuleLine" : 11,
      "ModuleName" : "i2s_quad_transmitter"
     }
    ]
   },
   {
    "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main.v",
    "InstLine" : 92,
    "InstName" : "main_tx_inst",
    "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
    "ModuleLine" : 2,
    "ModuleName" : "main_tx",
    "SubInsts" : [
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 30,
      "InstName" : "clocks",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/ultranet_tx_clocks.vhd",
      "ModuleLine" : 6,
      "ModuleName" : "ultranet_tx_clocks"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 53,
      "InstName" : "deserializer",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/i2s_quad_deserializer.vhd",
      "ModuleLine" : 7,
      "ModuleName" : "i2s_quad_deserializer"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 82,
      "InstName" : "serializer",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/ultranet_serializer.vhd",
      "ModuleLine" : 6,
      "ModuleName" : "ultranet_serializer"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 102,
      "InstName" : "transmitter",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/aes3tx.vhd",
      "ModuleLine" : 11,
      "ModuleName" : "aes3tx"
     }
    ]
   },
   {
    "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main.v",
    "InstLine" : 118,
    "InstName" : "main_tx_inst2",
    "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
    "ModuleLine" : 2,
    "ModuleName" : "main_tx",
    "SubInsts" : [
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 30,
      "InstName" : "clocks",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/ultranet_tx_clocks.vhd",
      "ModuleLine" : 6,
      "ModuleName" : "ultranet_tx_clocks"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 53,
      "InstName" : "deserializer",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/i2s_quad_deserializer.vhd",
      "ModuleLine" : 7,
      "ModuleName" : "i2s_quad_deserializer"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 82,
      "InstName" : "serializer",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/ultranet_serializer.vhd",
      "ModuleLine" : 6,
      "ModuleName" : "ultranet_serializer"
     },
     {
      "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/main_tx.v",
      "InstLine" : 102,
      "InstName" : "transmitter",
      "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/aes3tx.vhd",
      "ModuleLine" : 11,
      "ModuleName" : "aes3tx"
     }
    ]
   }
  ]
 },
 {
  "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/i2s_deser.vhd",
  "InstLine" : 17,
  "InstName" : "i2s_deser",
  "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/i2s_deser.vhd",
  "ModuleLine" : 17,
  "ModuleName" : "i2s_deser"
 },
 {
  "InstFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/spdif_transmitter.vhd",
  "InstLine" : 12,
  "InstName" : "spdif_transmitter",
  "ModuleFile" : "C:/Sdk/Gowin/Gowin_V1.9.10.03_Education_x64/IDE/bin/Documents/test_fpga_project/src/spdif_transmitter.vhd",
  "ModuleLine" : 12,
  "ModuleName" : "spdif_transmitter"
 }
]