- Power Messages
  - Configure Information
- Power Summary
  - Power Information
  - Thermal Information
  - Supply Information
- Power Details
  - Power By Block Type
  - Power By Hierarchy
  - Power By Clock Domain

# Power Messages

Report Title | Power Analysis Report
Design File | C:\sdk\Gowin\Gowin_V1.9.10.03_Education_x64\IDE\bin\Documents\test_fpga_project\impl\gwsynthesis\test_fpga_project.vg
Physical Constraints File | C:\sdk\Gowin\Gowin_V1.9.10.03_Education_x64\IDE\bin\Documents\test_fpga_project\src\main.cst
Timing Constraints File | C:\sdk\Gowin\Gowin_V1.9.10.03_Education_x64\IDE\bin\Documents\test_fpga_project\src\test_fpga_project.sdc
Tool Version | V1.9.10.03 Education (64-bit)
Part Number | GW1NR-LV9QN88PC6/I5
Device | GW1NR-9
Device Version | C
Created Time | Tue Mar 18 23:31:42 2025
Legal Announcement | Copyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.

## Configure Information:

Grade | Commercial
Process | Typical
Ambient Temperature | 25.000
Use Custom Theta JA | false
Heat Sink | None
Air Flow | LFM_0
Use Custom Theta SA | false
Board Thermal Model | None
Use Custom Theta JB | false
Related Vcd File |
Related Saif File |
Filter Glitches | false
Default IO Toggle Rate | 0.125
Default Remain Toggle Rate | 0.125

# Power Summary

## Power Information:

Total Power (mW) | 37.154
Quiescent Power (mW) | 26.536
Dynamic Power (mW) | 10.618
Psram Power (mW) | 86.000

## Thermal Information:

Junction Temperature | 25.763
Theta JA | 21.450
Max Allowed Ambient Temperature | 84.237

## Supply Information:

Voltage Source | Voltage | Dynamic Current(mA) | Quiescent Current(mA) | Power(mW)
--- | --- | --- | --- | ---
VCC | 1.200 | 6.642 | 3.507 | 12.180
VCCX | 3.300 | 0.411 | 5.000 | 17.855
VCCIO18 | 1.800 | 0.041 | 0.565 | 1.092
VCCIO33 | 3.300 | 0.369 | 1.457 | 6.027

# Power Details

## Power By Block Type:

Block Type | Total Power(mW) | Static Power(mW) | Average Toggle Rate(millions of transitions/sec)
--- | --- | --- | ---
Logic | 0.603 | NA | 16.461
IO | 10.166 | 7.026 | 11.304
PLL | 6.855 | NA | NA

## Power By Hierarchy:

Hierarchy Entity | Total Power(mW) | Block Dynamic Power(mW)
--- | --- | ---
top | 7.458 | 7.458(7.457)
top/main_rx_1_inst/ | 0.226 | 0.226(0.226)
top/main_rx_1_inst/clocks/ | 0.064 | 0.064(0.000)
top/main_rx_1_inst/demuxer/ | 0.037 | 0.037(0.000)
top/main_rx_1_inst/deserializer/ | 0.015 | 0.015(0.000)
top/main_rx_1_inst/receiver/ | 0.035 | 0.035(0.000)
top/main_rx_1_inst/transmitter/ | 0.075 | 0.075(0.000)
top/main_tx_inst/ | 0.366 | 0.366(0.366)
top/main_tx_inst/clocks/ | 0.053 | 0.053(0.000)
top/main_tx_inst/deserializer/ | 0.154 | 0.154(0.000)
top/main_tx_inst/serializer/ | 0.147 | 0.147(0.000)
top/main_tx_inst/transmitter/ | 0.011 | 0.011(0.000)
top/main_tx_inst2/ | 0.011 | 0.011(0.011)
top/main_tx_inst2/transmitter/ | 0.011 | 0.011(0.000)
top/pll_main_clock/ | 6.855 | 6.855(0.000)

## Power By Clock Domain:

Clock Domain | Clock Frequency(Mhz) | Total Dynamic Power(mW)
--- | --- | ---
pll_main_clock/rpll_inst/CLKOUTD.default_gen_clk | 122.880 | 0.198
main_rx_1_inst/aes3_bclk | 50.000 | 0.038
i2s_in_sclk | 24.576 | 6.932
pll_main_clock/rpll_inst/CLKOUT.default_gen_clk | 245.760 | 0.310
NO CLOCK DOMAIN | 0.000 | 0.000